1. Field of the Invention
This invention relates in general to circuits and more specifically to a contention-free keeper circuit and a method for contention elimination.
2. Description of the Related Art
Signal degradation on transmission lines, such as buses, word lines, or other control and/or data transmission lines is a significant problem. In particular, in a long transmission line the signal driven from one end of the line to the other end of the line degrades by the time it reaches the other end of the line. The signal degradation relates to degradation in the edge rate of the signal as well as degradation in the ability of the signal to reach a certain level. The edge rate of the signal may decrease as the signal propagates along a long transmission line. Similarly, the signal may not attain a certain level by the time it reaches the other end of the long transmission line.
Traditional approaches to solve this problem include the use of signal repeaters along the long transmission line. The use of signal repeaters along the line, however, introduces a delay in the signal being driven from one end of the line to the other end of the line. Other approaches to solve this problem have focused on the use of a keeper circuit attached to the other end of the transmission line. By way of example, FIG. 1 shows a conventional full-keeper circuit 10, which is attached to the other end of the transmission line. Conventional full-keeper circuit 10 includes a first node 12 and a second node 14 with an inverter 16 connected between first node 12 and second node 14. Full-keeper circuit 10 further includes a p-MOS transistor (P1) 18 with its control terminal coupled to second node 14. Full-keeper circuit 10 further includes an n-MOS transistor (N1) 20 with its control terminal coupled to second node 14. When a signal is transitioning from low to high at first node 12, at the point when the signal is low at first node 12, the signal is high at second node 14. As the signal at first node 12 goes beyond a certain level, the signal at second node 14 turns low, which turns on transistor (P1) 18 and thereby pulling up the rising signal at first node 12. On the other hand when the signal is transitioning from high to low at first node 12, at the point when the signal is high at first node 12, the signal is low at second node 14. As the signal at first node 12 goes below a certain threshold, the signal at second node turns high, which turns on transistor (N1) 20 and thereby pulling down the falling signal at first node 12. The presence of transistors (P1) 18 and (N1) 20, however, creates contention. In particular, as the signal at first node 12 goes from low to high, transistor (N1) 20 stays turned on until signal at second node 14 goes below the threshold voltage of transistor (N1) 20. During the time that transistor (N1) 20 stays on, it pulls down the signal at first node 12 even though the signal is rising. This creates a contention between the rising signal at first node 12 and transistor (N1) 20. Similarly, as the signal at first node 12 goes from high to low, transistor (P1) 18 stays turned on until the signal at second node 14 goes above the threshold voltage of transistor (P1) 18. During the time transistor (P1) 18 stays on, it pulls up the signal at first node even though the signal is falling. This creates a contention between the falling signal at first node 12 and transistor (P1) 18. This contention in turn creates a short circuit current path. That in turn increases the transition time between levels. Also, the short circuit current path results in increased current consumption.
Thus, there is a need for a contention-free keeper circuit and a method for contention elimination.